1. System Call Basics System calls (syscalls) are the interface for user-space programs to request services from the kernel. Examples include: File I/O: read(), write(), open(), close(). Device Control: ioctl(). Signal Handling: kill(), signal(). 2. System Call Table and Registration Syscall Table: A table (sys_call_table) maps syscall numbers to handler functions. Architecture-Specific: x86: Defined in arch/x86/entry/syscalls/syscall_64.tbl. ARM: Defined in arch/arm/tools/syscall.tbl. Registration: Syscalls are registered at compile time using macros like SYSCALL_DEFINE (e.g., SYSCALL_DEFINE3(write, ...) for write()). For custom syscalls (rare and discouraged), you would: Add an entry to the syscall table. Define the handler using SYSCALL_DEFINE. Recompile the kernel (or use modules for dynamic insertion). 3. Flow of System Calls 1. User-Space Invocation The libc wrapper (e.g., read(), ioctl()) triggers a software interrupt (int 0x80 on x86) or uses the syscall instruction (modern x86/ARM). // User-space code fd = open("/dev/mydevice", O_RDWR); // Syscall 1: open() read(fd, buf, 100); // Syscall 2: read() ioctl(fd, MY_CMD, arg); // Syscall 3: ioctl() close(fd); // Syscall 4: close() 2. Transition to Kernel Mode Switches to kernel mode (ring 0 on x86, EL1 on ARM). Saves user-space registers (e.g., RIP, RSP, EFLAGS). Jumps to the kernel’s syscall entry point (e.g., entry_SYSCALL_64 on x86) 3. Syscall Dispatching Syscall Number: The syscall number is stored in a register (e.g., RAX on x86, R7 on ARM). Example: __NR_read (syscall number for read()). Syscall Table: The kernel uses sys_call_table (array of function pointers) to find the handler. Example: sys_call_table[__NR_read] points to sys_read(). 4. Handler Execution in Process Context Generic Steps for All Syscalls: Argument Validation: Check pointers (e.g., buf in read()) using access_ok() Copy arguments from user space with copy_from_user() or get_user() Kernel Function Execution: Perform the requested operation (e.g., read from a file, send an ioctl command) File Operations (read/write): File Descriptor Resolution: Convert fd to a struct file using fdget(). Check file permissions (FMODE_READ/FMODE_WRITE). Driver Interaction: Call the read/write method from the file’s file_operations struct. Example: For /dev/mydevice, this invokes the driver’s .read function. I/O Control (ioctl): The ioctl syscall (sys_ioctl()) calls the driver’s .unlocked_ioctl method. 5. Return to User Space: Result is stored in eax/r0, and the kernel restores user registers Execute iret (x86) or exception return (ARM) to resume user-mode execution. 4. Device File Operations Character devices (e.g., /dev/char_dev) expose operations via file_operations: ...

1. Interrupt Generation A hardware device (e.g., NIC, keyboard) raises an interrupt via the Programmable Interrupt Controller (PIC/APIC). The PIC converts the IRQ line into a vector number and signals the CPU via the INTR/NMI pin. 2. CPU State Save & Context Switch The CPU finishes the current instruction, saves the process context (registers, PC, flags) to the stack, and disables local interrupts Switches to the interrupt context (no associated process, interrupts disabled). 3. IDT Lookup The CPU uses the Interrupt Descriptor Table (IDT) to find the handler address for the interrupt vector. On ARM, the vector table (similar to x86 IDT) is preconfigured with handlers like handle_level_irq or handle_edge_irq. 4. Top Half Execution Immediate Actions: Acknowledge the interrupt at the hardware level (irq_data.chip->irq_ack()) Read device status registers to confirm the interrupt source Minimal Processing: Copy critical data (e.g., network packets) to kernel buffers. Schedule deferred processing via bottom halves (tasklets, softirqs) APIs: request_irq(), free_irq() for driver-level registration. 5. Bottom Half Execution Deferred Work: Process data in safe contexts (e.g., tasklet_schedule() or workqueues). Runs with interrupts enabled (softirq context) or in process context (workqueues). Mechanisms: SoftIRQs: Statically allocated, high-priority (e.g., network RX) Tasklets: Dynamically allocated, atomic (e.g., USB transfers). Workqueues: Sleepable, process context (e.g., filesystem I/O) . 6. Interrupt Completion Send End-of-Interrupt (EOI) to the PIC (e.g., irq_data.chip->irq_eoi()) The result is stored in eax/r0, and the kernel uses iret (x86) or exception return (ARM) to resume user execution. 7. Examples Network Driver (Hardware Interrupt) Top Half: irqreturn_t nic_isr(int irq, void *dev_id) { // Read packet from hardware buffer tasklet_schedule(&nic_tasklet); // Schedule bottom half return IRQ_HANDLED; } Bottom Half: void nic_tasklet_fn(unsigned long data) { // Process packets, update kernel networking stack }

Q1: What happens if another interrupt occurs while a top half (ISR) is executing? Answer: By default, interrupts are disabled during the top half execution. When the CPU enters the ISR (via the IDT), it automatically clears the Interrupt Flag (IF) on x86 (using cli), preventing further interrupts until the ISR finishes. Exception: Some architectures or configurations (e.g., nested interrupts) allow interrupts to preempt an ISR. For example: IRQF_DISABLED (now deprecated): Previously controlled whether interrupts were disabled during the ISR. Modern kernels typically disable interrupts for all IRQ handlers by default. Threaded interrupts (using IRQF_ONESHOT or IRQF_THREAD): The “top half” runs in a kernel thread with interrupts enabled. Key Takeaway: ...

What it is: A table used by the CPU to map interrupt/exception numbers to their corresponding handlers (ISRs). Setup: The kernel initializes the IDT during boot. Each entry contains: Address of the ISR (Interrupt Service Routine). Privilege level (kernel/user). Type (trap, interrupt gate, etc.). CPU Interaction: The CPU uses the IDTR register (set via lidt instruction) to locate the IDT. When an interrupt occurs, the CPU indexes into the IDT using the interrupt vector number to find the ISR.

Overview An interrupt is a signal that breaks the normal execution flow to handle an event. When an interrupt occurs, the CPU pauses its current task, jumps to an interrupt service routine (ISR), and after the ISR completes it resumes the original task. In other words, interrupts let hardware or software requests “call” the CPU’s attention immediately, then let the program continue “as if nothing happened” after handling it. Why are interrupts needed? Avoid Polling: More efficient than continuously checking device status (polling), reducing CPU overhead and increasing system throughput Real-Time Responsiveness: Essential for systems requiring quick reactions to events Automotive airbag systems detecting collisions Network Interface Cards (NICs) processing incoming packets Interrupt Types Hardware Interrupts: Triggered by devices (e.g., keyboard, NIC). Managed by the Programmable Interrupt Controller (PIC) or APIC. Software Interrupts: Generated by software (e.g., int 0x80 for syscalls). Exceptions: CPU-generated (e.g., divide-by-zero, page faults). How the Kernel Registers Interrupts [3-Resource/Platform/Interrupt Descriptor Table (IDT)]({< ref “/posts/3-resource/platform/interrupt-descriptor-table-(idt)/” >}}) Initialization: At boot, the kernel populates the IDT with default handlers (e.g., for exceptions). Hardware interrupts are mapped to a generic entry (e.g., common_interrupt on x86). Device Drivers: Drivers request a specific IRQ (Interrupt Request Line) using request_irq(). Example: int request_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, const char *name, void *dev); irq: The interrupt number (e.g., IRQ 1 for keyboard). handler: The ISR function. flags: Options like IRQF_SHARED for shared interrupts. dev: A cookie passed to the ISR (used for shared IRQs). What happens when an interrupt is occurred? See [3-Resource/Platform/Interrupt Handling Flow]({< ref “/posts/3-resource/platform/interrupt-handling-flow/” >}}) ...

The POCO C++ Libraries are powerful cross-platform C++ libraries for building network- and internet-based applications that run on desktop, server, mobile, IoT, and embedded systems. Cross-Compiling With a proper CMake toolchain file (specified via the CMAKE_TOOLCHAIN_FILE CMake variable), the POCO C++ Libraries can be cross-compiled for embedded Linux systems: mkdir cmake-build cd cmake-build cmake .. -DCMAKE_TOOLCHAIN_FILE=/path/to/mytoolchain.cmake -DCMAKE_INSTALL_PREFIX=/path/to/target cmake -DENAMLE-SAMPLE=YES cmake --build . --target install # make all install OR mkdir cmake-build-ipc2 && cd cmake-build-ipc2 && cmake .. -DCMAKE_TOOLCHAIN_FILE= /opt/IPCam2_Host/host/share/buildroot/toolchainfile.cmake -DCMAKE_INSTALL_PREFIX=target -DENABLE_SAMPLES=ON -DBUILD_SHARED_LIBS=ON Installing The POCO C++ Libraries headers and libraries can be optionally be installed by building the install target. ...

Using External Toolchain Option 1: Give tarball URL Specify URL for the tarball in BR_TOOLCHAIN_EXTERNAL_URL Example: BR_TOOLCHAIN_EXTERNAL_URL=http://artifactory/my-toolchain.tar.xz In this case you will have to deselect BR2_PRIMARY_SITE_ONLY option Option 2: Give tarball relative dl path If BR2_PRIMARY_SITE_ONLY option is selected then you have to keep the toolchain inside dl/toolchain-external-custom/ directory and pass the name of tarball to BR_TOOLCHAIN_EXTERNAL_URL Example: BR2_PRIMARY_SITE="http://artifactory/buildroot-sources" BR2_PRIMARY_SITE_ONLY=y BR_TOOLCHAIN_EXTERNAL_URL=my-toolcahin.tar.xz This will extract the toolchain to buildroot’s build directory output/host/opt/ext-toolchain ...

Comparison Table Data Structure Structure Type Search Complexity Insertion Complexity Deletion Complexity Use Cases Advantages Disadvantages Array Contiguous block of memory O(1) for access; O(n) for search (unsorted) O(n) (shifting elements) O(n) (shifting elements) Static collections, lookup tables Fast random access, cache friendly Fixed size (static arrays), expensive mid-operations Linked List Node-based (non-contiguous memory) O(n) O(1) (with pointer/reference) O(1) (with pointer/reference) Dynamic lists, implementing stacks/queues Dynamic size, efficient insertions/deletions No random access, additional memory for pointers Stack LIFO (often implemented via array or linked list) O(n) if searching required O(1) (push) O(1) (pop) Function calls, recursion, backtracking Simple, constant-time push/pop Access restricted to the top element Queue FIFO (often implemented via array or linked list) O(n) if searching required O(1) (enqueue) O(1) (dequeue) Scheduling, buffering, process management Simple FIFO order, constant time operations Access restricted to front/rear only Binary Search Tree Hierarchical tree (ordered) O(log n) average; O(n) worst-case O(log n) average; O(n) worst-case O(log n) average; O(n) worst-case Maintaining sorted data, dynamic sets Efficient average-case operations, maintains order Unbalanced trees can degrade to O(n) operations Heap (Binary Heap) Complete binary tree O(n) for arbitrary search O(log n) O(log n) Priority queues, heap sort Fast access to min/max element, efficient insertion/deletion Not efficient for general searching Hash Table Key-value mapping using hashing O(1) average; O(n) worst-case O(1) average; O(n) worst-case O(1) average; O(n) worst-case Dictionaries, caches, indexing Extremely fast average-case operations Performance depends on hash function; worst-case linear; unordered Graph Collection of nodes (vertices) and edges Varies (algorithm dependent) Varies (representation dependent) Varies (representation dependent) Modeling networks, routing, social networks Models complex relationships, versatile Implementation complexity; can be memory-intensive Additional Notes Arrays are best for scenarios where the size is fixed and fast random access is required. Linked Lists shine in situations requiring frequent insertions and deletions with dynamic sizing. Stacks and Queues provide simple, ordered data access patterns suitable for specific algorithmic strategies. Binary Search Trees offer ordered storage with efficient average-case performance, though balanced versions (like AVL or Red-Black trees) are preferred in practice. Heaps are ideal for priority-based tasks. Hash Tables are invaluable for fast lookup tasks, provided a well-designed hash function minimizes collisions. Graphs are essential for representing interconnected data but require careful design regarding representation (adjacency list vs. matrix) based on the use case.

Overview A relocatable toolchain/SDK is a self-contained set of cross-compilation tools that can be moved to different locations without breaking dependencies. Buildroot provides an option to generate such a toolchain, allowing developers to use it for cross-compiling applications without depending on a fixed absolute path. Prepare Relocatable SDK Configure Buildroot for SDK Generation Disable BusyBox and set /bin/sh to None under System configuration. This prevents unnecessary shell dependencies within the SDK, ensuring better relocatability. ...

Truth Table X Y X & Y X | Y X ^ Y 0 0 0 0 0 0 1 0 1 1 1 0 0 1 1 1 1 1 1 0 Points to Remember The left-shift and right-shift operators should not be used for negative numbers Left Shift(<<) just means multiply by 2. Similarly >> results division by 2. XOR results 0 if both bits are same. So a^1=~a , a^0=a and a^a=0. Questions How to toggle or flip a particular bit in a number? To toggle any bit in a variable, Use (^) exclusive OR operator. #define togglebit(data, bit) (data* = data ^ (1<<bit)) Write MACRO to Swap the bytes in 16bit Integer Variable. #define ByteSwap16(Value) ((Value & 0x00FF) << 8) | ((Value & 0xFF00) >> 8) #define ByteSwap32(Value) ((Value & 0x000000FF) << 24) | ((Value & 0x0000FF00U) << 8) | ((Value & 0x00FF0000U) >> 8) | ((Value & 0xFF000000U) >> 24) Count the number of set bits in a number unsigned int countSetBits( unsigned int number ) { unsigned int count = 0; while( number != 0) { count++; number &= (number-1); } return count; } Swap 2 bits of given integer int swapBits(unsigned int n, unsigned int p1, unsigned int p2) { unsigned int bit1 = (n >> p1) & 1; /* Move p1'th to rightmost side */ unsigned int bit2 = (n >> p2) & 1; /* Move p2'th to rightmost side */ unsigned int x = (bit1 ^ bit2); /* XOR the two bits */ /* Put the xor bit back to their original positions */ x = (x << p1) | (x << p2); /* XOR 'x' with the original number so that the two sets are swapped */ unsigned int result = n ^ x; }